1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor package for protecting a semiconductor chip and connecting the semiconductor chip with an external device.
2. Description of the Related Art
As the integration density of semiconductor chips increases, the number of pads of each semiconductor chip increases. However, semiconductor packages are being continuously demanded to be smaller and lighter with an increasing demand for portable semiconductor products. For example, a chip scale package (CSP) can reduce the size of a semiconductor package by forming terminals on pads of a semiconductor chip.
However, the terminals of the CSP are required to be large enough to form a stable electrical contact with an external device and to be separated from one another by suitable pitches. For example, when the terminals of the CSP are connected to an external device by solder balls, and the pitch between terminals is less than or equal to a predetermined value, the solder balls may adhere to each other. For example, JEDEC standards prescribe a minimum pitch between the terminals.
The JEDEC Solid State Technology Association (once known as the Joint Electron Device Engineering Council), is the semiconductor engineering standardization body of the Electronic Industries Alliance (EIA), a trade association that represents all areas of the electronics industry. JEDEC was originally created in 1960 as a joint activity between EIA an NEMA, to cover the standardization of discrete semiconductor devices and later expanded in 1970 to include integrated circuits. JEDEC establishes standards for the spacing of external contacts that lead into integrated circuit and semiconductor device packages. Spacing of the external contacts are important because suppliers of die attach equipment and soldering equipment must know the spacing between the contact leads or pads of a circuit of a device into to attach the circuit or device to a printed circuit board so that the soldered contacts do not interfere with each other.
However, a decrease in the number of pads of each semiconductor chip requires an increase in the number of terminals of the CSP. Hence, it is difficult to form an increased number of terminals spaced from each other at a predetermined pitch on a small semiconductor chip. As a result, the terminals may extend up to the outside of the semiconductor chip, and thus additional wires for connecting the pads on the semiconductor chip to the terminals may be needed.
For example, U.S. Pat. No. 6,001,671, issued to Fjelstad, discloses a semiconductor package in which conductive pads are used as terminals and a semiconductor chip is connected to the terminals by wire bonding.
However, a method of manufacturing the semiconductor package, which is disclosed in U.S. Pat. No. 6,001,671, is complicated because it requires a wire bonding process. Also, in the method, the conductive pads can only be disposed around the semiconductor chip, thus enlarging the semiconductor package.